- Patent Title: Apparatuses and methods including memory array data line selection
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Application No.: US14709210Application Date: 2015-05-11
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Publication No.: US09318211B2Publication Date: 2016-04-19
- Inventor: Toru Tanzawa
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G11C16/26 ; H01L27/115
Abstract:
Some embodiments include an apparatus having data lines coupled to memory cell strings and a selector configured to selectively couple one of the data lines to a node. The memory cell strings and the selector can be formed in the same memory array of the apparatus. Other embodiments including additional apparatus and methods are described.
Public/Granted literature
- US20150243364A1 APPARATUSES AND METHODS INCLUDING MEMORY ARRAY DATA LINE SELECTION Public/Granted day:2015-08-27
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