Invention Grant
US09318345B2 Enhancing transistor performance by reducing exposure to oxygen plasma in a dual stress liner approach
有权
通过在双重应力衬垫方法中减少暴露于氧等离子体来提高晶体管性能
- Patent Title: Enhancing transistor performance by reducing exposure to oxygen plasma in a dual stress liner approach
- Patent Title (中): 通过在双重应力衬垫方法中减少暴露于氧等离子体来提高晶体管性能
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Application No.: US13253210Application Date: 2011-10-05
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Publication No.: US09318345B2Publication Date: 2016-04-19
- Inventor: Ronald Naumann , Volker Grimm , Andrey Zakharov , Ralf Richter
- Applicant: Ronald Naumann , Volker Grimm , Andrey Zakharov , Ralf Richter
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Main IPC: H01L21/31
- IPC: H01L21/31 ; H01L21/311 ; H01L21/8238 ; H01L21/02 ; H01L29/78
Abstract:
When forming strain-inducing dielectric material layers above transistors of different conductivity type, the patterning of at least one strain-inducing dielectric material may be accomplished on the basis of a process sequence in which a negative influence of a fluorine species in an oxygen plasma upon removing the resist mask is avoided or at least significantly suppressed. For example, a substantially oxygen-free plasma process may be applied for removing the resist material.
Public/Granted literature
- US20130089985A1 Enhancing Transistor Performance by Reducing Exposure to Oxygen Plasma in a Dual Stress Liner Approach Public/Granted day:2013-04-11
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