Invention Grant
- Patent Title: Device isolation for III-V substrates
- Patent Title (中): III-V基板的器件隔离
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Application No.: US14298421Application Date: 2014-06-06
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Publication No.: US09318561B2Publication Date: 2016-04-19
- Inventor: Anirban Basu , Guy M. Cohen
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Michael J. Chang, LLC
- Agent Louis J. Percello
- Main IPC: H01L33/00
- IPC: H01L33/00 ; H01L29/205 ; H01L21/02 ; H01L21/3065 ; H01L29/06
Abstract:
Techniques for device isolation for III-V semiconductor substrates are provided. In one aspect, a method of fabricating a III-V semiconductor device is provided. The method includes the steps of: providing a substrate having an indium phosphide (InP)-ready layer; forming an iron (Fe)-doped InP layer on the InP-ready layer; forming an epitaxial III-V semiconductor material layer on the Fe-doped InP layer; and patterning the epitaxial III-V semiconductor material layer to form one or more active areas of the device. A III-V semiconductor device is also provided.
Public/Granted literature
- US20150357417A1 Device Isolation for III-V Substrates Public/Granted day:2015-12-10
Information query
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