Invention Grant
- Patent Title: Vertical gallium nitride JFET with gate and source electrodes on regrown gate
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Application No.: US14606822Application Date: 2015-01-27
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Publication No.: US09318619B2Publication Date: 2016-04-19
- Inventor: Donald R. Disney , Hui Nie , Isik C. Kizilyalli , Richard J. Brown
- Applicant: Avogy, Inc.
- Applicant Address: US CA San Jose
- Assignee: Avogy, Inc.
- Current Assignee: Avogy, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Kilpatrick Townsend & Stockton LLP
- Main IPC: H01L29/808
- IPC: H01L29/808 ; H01L29/70 ; H01L29/40 ; H01L29/66 ; H01L29/06 ; H01L29/20

Abstract:
A semiconductor structure includes a GaN substrate with a first surface and a second surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. A first electrode is electrically coupled to the second surface of the GaN substrate. The semiconductor structure further includes a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the GaN substrate and a second GaN layer of a second conductivity type coupled to the first GaN epitaxial layer. The first GaN epitaxial layer comprises a channel region. The second GaN epitaxial layer comprises a gate region and an edge termination structure. A second electrode coupled to the gate region and a third electrode coupled to the channel region are both disposed within the edge termination structure.
Public/Granted literature
- US20150137140A1 VERTICAL GALLIUM NITRIDE JFET WITH GATE AND SOURCE ELECTRODES ON REGROWN GATE Public/Granted day:2015-05-21
Information query
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