Invention Grant
- Patent Title: Source synchronous bus signal alignment compensation mechanism
- Patent Title (中): 源同步总线信号对准补偿机制
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Application No.: US13747187Application Date: 2013-01-22
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Publication No.: US09319035B2Publication Date: 2016-04-19
- Inventor: Vanessa S. Canac , James R. Lundberg
- Applicant: VIA Technologies, Inc.
- Applicant Address: TW New Taipei
- Assignee: VIA TECHNOLOGIES, INC.
- Current Assignee: VIA TECHNOLOGIES, INC.
- Current Assignee Address: TW New Taipei
- Agent Richard K. Huffman; James W. Huffman
- Main IPC: G06F3/00
- IPC: G06F3/00 ; G06F5/00 ; G06F13/42 ; H03K5/06

Abstract:
An apparatus having a bit lag control element that measures a propagation time beginning with assertion of a first signal and ending with assertion of a second signal, and that generates a first value indicating an adjusted propagation time. The control element includes delay lock control, adjust logic, and a gray encoder. The delay lock control selects one of a plurality of successively delayed versions of the first signal that coincides with the assertion the second signal, and generates a second value on a lag select bus that indicates the propagation time. The adjust logic is coupled to a circuit and to the lag select bus, and adjusts the second value by an amount prescribed by the circuit to yield a third value that is output to an adjusted lag bus. The gray encoder gray encodes the third value to generate the first value on the lag bus.
Public/Granted literature
- US20140204691A1 SOURCE SYNCHRONOUS BUS SIGNAL ALIGNMENT COMPENSATION MECHANISM Public/Granted day:2014-07-24
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