Invention Grant
US09323285B2 Metastability prediction and avoidance in memory arbitration circuitry
有权
存储器仲裁电路中的可弹性预测和避免
- Patent Title: Metastability prediction and avoidance in memory arbitration circuitry
- Patent Title (中): 存储器仲裁电路中的可弹性预测和避免
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Application No.: US13966130Application Date: 2013-08-13
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Publication No.: US09323285B2Publication Date: 2016-04-26
- Inventor: David Lewis
- Applicant: Altera Corporation
- Applicant Address: US CA San Jose
- Assignee: Altera Corporation
- Current Assignee: Altera Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: G06F1/08
- IPC: G06F1/08 ; G11C7/10 ; G11C7/22

Abstract:
An integrated circuit with hazard prediction and prevention circuitry is provided. The hazard prediction circuitry may predict a future hazard condition between two periodic signals, and the hazard prevention circuitry may selectively delay at least one of the two periodic signals to avoid the predicted hazard condition. Single-port memory cells may provide multiport memory functionality using an arbitration circuit that includes the hazard prediction and prevention circuitry and receives memory access requests from at least two request generators. The arbitration circuit may operate in synchronous mode and perform port selection based on a predetermined logic table. The arbitration circuit may also operate in asynchronous mode and execute a memory access request as soon as it is received by the arbitration circuit. Metastability caused by receiving memory access requests at the same time from at least two request generators may be avoided with the hazard prediction and prevention circuitry.
Public/Granted literature
- US20150052380A1 METASTABILITY PREDICTION AND AVOIDANCE IN MEMORY ARBITRATION CIRCUITRY Public/Granted day:2015-02-19
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