Invention Grant
US09323315B2 Method and system for automatic clock-gating of a clock grid at a clock source
有权
时钟源时钟网格自动时钟门控的方法和系统
- Patent Title: Method and system for automatic clock-gating of a clock grid at a clock source
- Patent Title (中): 时钟源时钟网格自动时钟门控的方法和系统
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Application No.: US13586517Application Date: 2012-08-15
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Publication No.: US09323315B2Publication Date: 2016-04-26
- Inventor: Guillermo Juan Rozas
- Applicant: Guillermo Juan Rozas
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA CORPORATION
- Current Assignee: NVIDIA CORPORATION
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06F1/26
- IPC: G06F1/26 ; G06F1/32 ; G06F9/38 ; G06F11/07 ; G06F11/30
Abstract:
A system and method for power management by performing clock-gating at a clock source. In the method a critical stall condition is detected within a clocked component of a core of a processing unit. The core includes one or more clocked components synchronized in operation by a clock signal distributed by a clock grid. The clock grid is clock-gated to suspend distribution of the clock signal to the core during the critical stall condition.
Public/Granted literature
- US20140053008A1 METHOD AND SYSTEM FOR AUTOMATIC CLOCK-GATING OF A CLOCK GRID AT A CLOCK SOURCE Public/Granted day:2014-02-20
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