The invention relates to a circuit and to a method for generating a start sequence. The circuit comprises at least one partially programmable memory (nonvol) for storing an encoded start sequence (Ni) and a control unit (CTRL), which is equipped to read the encoded start sequence (Ni) and decode it into a decoded start sequence (dNi) and to generate a target register address (n) depending on the decoded start sequence (dNi). An addressable memory (vol) is provided, to which the decoded start sequence (dNi) can be written by means of the control unit (CTRL) at the target register address (n).