A Gate Driver on Array (GOA) circuit according to this disclosure may include M cascaded GOA units. The M GOA units may have a one-to-one correspondence with M rows of pixels within a pixel region. And a Gate signal and a Reset signal may be outputted from each GOA unit. A Gate signal output from a GOA unit in an n-th row may be an input signal of a GOA unit in an (n+1)-th, where n is a natural number less than M.