Invention Grant
- Patent Title: System and method for a level shifting decoder
- Patent Title (中): 电平转换解码器的系统和方法
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Application No.: US14183225Application Date: 2014-02-18
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Publication No.: US09324399B2Publication Date: 2016-04-26
- Inventor: Marco Pasotti , Abhishek Lal , Rajat Kulshrestha
- Applicant: STMicroelectronics International N.V. , STMicroelectronics S.r.l
- Applicant Address: NL Amsterdam IT Agrate Brianza
- Assignee: STMICROELECTRONICS INTERNATIONAL NV,STMICROELECTRONICS S.R.L.
- Current Assignee: STMICROELECTRONICS INTERNATIONAL NV,STMICROELECTRONICS S.R.L.
- Current Assignee Address: NL Amsterdam IT Agrate Brianza
- Agency: Slater & Matsil, L.L.P.
- Main IPC: G11C8/10
- IPC: G11C8/10 ; G11C8/08 ; G11C8/06 ; G11C16/12
Abstract:
According to various embodiments described herein, a circuit includes a decode logic circuit, a buffer coupled to the decode logic, a positive level shifter with an input coupled to receive address signals and an output coupled to the buffer, and a negative level shifter with an input coupled to receive the address signals and an output coupled to the buffer.
Public/Granted literature
- US20150235686A1 System and Method for a Level Shifting Decoder Public/Granted day:2015-08-20
Information query
