Invention Grant
- Patent Title: Selective dual cycle write operation for a self-timed memory
- Patent Title (中): 选择性的双周期写入操作为自定时存储器
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Application No.: US13949449Application Date: 2013-07-24
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Publication No.: US09324414B2Publication Date: 2016-04-26
- Inventor: Nishu Kohli , Shishir Kumar
- Applicant: STMicroelectronics International N.V.
- Applicant Address: NL Amsterdam
- Assignee: STMICROELECTRONICS INTERNATIONAL N.V.
- Current Assignee: STMICROELECTRONICS INTERNATIONAL N.V.
- Current Assignee Address: NL Amsterdam
- Agency: Gardere Wynne Sewell LLP
- Main IPC: G11C8/16
- IPC: G11C8/16 ; G11C11/419 ; G11C7/22

Abstract:
A write is performed to a first cell of a memory at a first row and column during a first memory access cycle. A memory access operation is made to a second cell at a second row and column during an immediately following second memory access cycle. If the memory access is a read from the second cell and the second row is the same as the first row, or if the memory access is a write to the second cell and the second row is the same as the first row and the second column is different than the first column, then a simultaneous operation is performed during the second memory access cycle. The simultaneous operation is an access of the second cell (for read or write) and a re-write of data from the first memory access cycle write operation back to the first cell.
Public/Granted literature
- US20150029795A1 SELECTIVE DUAL CYCLE WRITE OPERATION FOR A SELF-TIMED MEMORY Public/Granted day:2015-01-29
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