A nonvolatile semiconductor memory device includes: a cell array including MATs (unit cell arrays) arranged in matrix, each of the MATs having memory cells, each of the memory cells having a variable resistive element of which resistance is nonvolatilely stored as data; and write/erase circuits connected to the MATs and operative to execute data write or erase to the memory cells inside the MATs in accordance with input data. A part of the write/erase circuits writes data to memory cells inside a corresponding MAT while another part of the write/erase circuits erases data from memory cells inside a corresponding MAT at the same time.