Invention Grant
- Patent Title: Process for fabricating a circuit substrate
- Patent Title (中): 制造电路基板的工艺
-
Application No.: US14789998Application Date: 2015-07-02
-
Publication No.: US09324580B2Publication Date: 2016-04-26
- Inventor: Chen-Yueh Kung , Wen-Yuan Chang
- Applicant: VIA Technologies, Inc.
- Applicant Address: TW New Taipei
- Assignee: VIA Technologies, Inc.
- Current Assignee: VIA Technologies, Inc.
- Current Assignee Address: TW New Taipei
- Agency: Jianq Chyun IP Office
- Priority: TW101133850A 20120914
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L21/48 ; H01L23/48 ; H01L21/32 ; H01L21/683 ; H01L23/00 ; H01L23/498 ; H05K1/11 ; H05K3/24 ; H05K3/40 ; H05K3/42 ; H05K3/46

Abstract:
A process for fabricating a circuit substrate is provided. The process includes the following steps. A carrier is provided. A conductive layer and a dielectric layer are placed on the carrier, and the conductive layer is located between the carrier and the dielectric layer. The dielectric layer is patterned to form a patterned-dielectric layer having first openings partially exposing the conductive layer. Arc-shaped grooves are formed on the exposed part of the conductive layer. A first-patterned-photoresist layer having second openings respectively connecting the first openings is formed. Conductive structures are formed, wherein each of the conductive structures is integrally formed and includes a pad part, a connection part, and a protruding part; the second openings, the first openings and the arc-shaped grooves are respectively filled with the pad parts, the connection parts and the protruding parts. The first patterned photoresist layer, the carrier and the conductive layer are removed.
Public/Granted literature
- US20150303074A1 PROCESS FOR FABRICATING THE SAME Public/Granted day:2015-10-22
Information query
IPC分类: