Invention Grant
- Patent Title: Semiconductor structures with shallow trench isolations
- Patent Title (中): 具有浅沟槽隔离的半导体结构
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Application No.: US13967558Application Date: 2013-08-15
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Publication No.: US09324603B2Publication Date: 2016-04-26
- Inventor: Shin-Yeu Tsai , Chia-Hui Lin , Ching-Yu Chen , Chui-Ya Peng
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Maschoff Brennan
- Main IPC: H01L21/762
- IPC: H01L21/762

Abstract:
A method is disclosed that includes the operations outlined below. An insulating material is disposed within a plurality of trenches on a semiconductor substrate and over the semiconductor substrate. The first layer is formed over the insulating material. The first layer and the insulating material are removed.
Public/Granted literature
- US20150048475A1 Semiconductor Structures With Shallow Trench Isolations Public/Granted day:2015-02-19
Information query
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