Invention Grant
- Patent Title: Method for manufacturing MOSFET
- Patent Title (中): 制造MOSFET的方法
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Application No.: US14430690Application Date: 2012-10-30
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Publication No.: US09324835B2Publication Date: 2016-04-26
- Inventor: Haizhou Yin , Huilong Zhu
- Applicant: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
- Applicant Address: CN Beijing
- Assignee: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
- Current Assignee: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
- Current Assignee Address: CN Beijing
- Agency: Pillsbury Winthrop Shaw Pittman LLP
- Priority: CN201210407135 20121023
- International Application: PCT/CN2012/083749 WO 20121030
- International Announcement: WO2014/063380 WO 20140501
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66 ; H01L21/336 ; H01L21/02 ; H01L21/265 ; H01L29/04 ; H01L29/08 ; H01L21/266 ; H01L21/306 ; H01L21/762 ; H01L29/06 ; H01L29/161

Abstract:
A method for manufacturing a MOSFET, including: performing ion implantation, via a shallow trench surrounding an active region in a semiconductor substrate, into a first sidewall of the active region and into a second sidewall of the active region opposite to the first sidewall to form a first heavily doped region in the first sidewall and a second heavily doped region in the second sidewall; filling the shallow trench with an insulating material, to form a shallow trench isolation; forming a gate stack and an insulating layer on the substrate, wherein the insulating layer surrounds and caps the gate stack; forming openings in the substrate using the shallow trench isolation, the first and second heavily doped regions, and the insulating layer as a hard mask; and epitaxially growing a semiconductor layer with a bottom surface and sidewalls of each of the openings as a seed layer.
Public/Granted literature
- US20150255577A1 METHOD FOR MANUFACTURING MOSFET Public/Granted day:2015-09-10
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