Invention Grant
- Patent Title: Semiconductor device and semiconductor device manufacturing method
- Patent Title (中): 半导体器件和半导体器件制造方法
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Application No.: US14079072Application Date: 2013-11-13
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Publication No.: US09324847B2Publication Date: 2016-04-26
- Inventor: Takashi Yoshimura , Hidenao Kuribayashi , Yuichi Onozawa , Hayato Nakano , Daisuke Ozaki
- Applicant: FUJI ELECTRIC CO., LTD.
- Applicant Address: JP Kawasaki-shi
- Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee Address: JP Kawasaki-shi
- Agency: Rossi, Kimms & McDowell LLP
- Priority: JP2011-111709 20110518
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/739 ; H01L29/08 ; H01L29/36

Abstract:
In some aspects of the invention, an n-type field-stop layer can have a total impurity of such an extent that a depletion layer spreading in response to an application of a rated voltage stops inside the n-type field-stop layer together with the total impurity of an n− type drift layer. Also, the n-type field-stop layer can have a concentration gradient such that the impurity concentration of the n-type field-stop layer decreases from a p+ type collector layer toward a p-type base layer, and the diffusion depth is 20 μm or more. Furthermore, an n+ type buffer layer of which the peak impurity concentration can be higher than that of the n-type field-stop layer at 6×1015 cm−3 or more, and one-tenth or less of the peak impurity concentration of the p+ type collector layer, can be included between the n-type field-stop layer and p+ type collector layer.
Public/Granted literature
- US20140070268A1 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD Public/Granted day:2014-03-13
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