A gate dielectric material and a gate conductor portion are formed on a single-crystal semiconductor material of a substrate. A dielectric structure is then formed surrounding the gate conductor portion and thereafter a stressor layer is formed on the dielectric structure. A controlled spalling process is then performed and thereafter a material removal process can be used to expose a surface of the single-crystal semiconductor material. A source region and a drain region are then formed on the exposed surface of the single-crystal semiconductor material, which exposed surface is opposite the surface including the gate dielectric.