Invention Grant
- Patent Title: Rectification circuit and wireless communication apparatus using the same
- Patent Title (中): 整流电路和使用其的无线通信装置
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Application No.: US13973226Application Date: 2013-08-22
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Publication No.: US09325362B2Publication Date: 2016-04-26
- Inventor: Toshiyuki Umeda , Shoji Otaka
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Minato-ku
- Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2012-218785 20120928
- Main IPC: H03M5/02
- IPC: H03M5/02 ; H04B1/18 ; H02M1/088 ; H02J5/00 ; H03K17/30

Abstract:
A rectification circuit includes a first field-effect transistor and a bias voltage generation circuit. The field-effect transistor includes a first gate terminal, a first source terminal, a first source region having a first p-type diffusion layer and connected to the first source terminal, a first drain terminal, and a first drain region having a first n-type diffusion layer and connected to the first drain terminal. The bias voltage generation circuit is configured to apply a DC voltage between the first gate terminal and the first drain terminal.
Public/Granted literature
- US20140093016A1 RECTIFICATION CIRCUIT AND WIRELESS COMMUNICATION APPARATUS USING THE SAME Public/Granted day:2014-04-03
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