Invention Grant
- Patent Title: Integrated circuit using method for setting level of reference voltage
- Patent Title (中): 集成电路使用方法设定参考电压电平
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Application No.: US13033685Application Date: 2011-02-24
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Publication No.: US09330750B2Publication Date: 2016-05-03
- Inventor: Jeong Hun Lee
- Applicant: Jeong Hun Lee
- Applicant Address: KR Icheon-si
- Assignee: SK HYNIX INC.
- Current Assignee: SK HYNIX INC.
- Current Assignee Address: KR Icheon-si
- Agency: William Park & Associates Ltd.
- Priority: KR10-2010-0066048 20100708
- Main IPC: G11C11/4072
- IPC: G11C11/4072 ; G11C5/14 ; G11C11/406 ; G11C11/4074 ; H03K5/08 ; H03M1/76

Abstract:
An integrated circuit includes a reference voltage level setting circuit and a reference voltage generation circuit. The reference voltage level setting circuit is configured to set a level of an input reference voltage to a preset level in a power-up period or a self-refresh mode. The reference voltage generation circuit is configured to select one of a plurality of reference voltages and output the selected reference voltage as the input reference voltage when the power-up period is ended and an operation mode is not in the self-refresh mode.
Public/Granted literature
- US20120008431A1 INTEGRATED CIRCUIT USING METHOD FOR SETTING LEVEL OF REFERENCE VOLTAGE Public/Granted day:2012-01-12
Information query
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