Invention Grant
- Patent Title: Three dimensional stacked nonvolatile semiconductor memory
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Application No.: US14460400Application Date: 2014-08-15
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Publication No.: US09330761B2Publication Date: 2016-05-03
- Inventor: Hiroshi Maejima
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Minato-ku
- Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P
- Priority: JP2008-112657 20080423
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G11C5/02 ; G11C5/06 ; G11C16/08 ; H01L27/115

Abstract:
A three dimensional stacked nonvolatile semiconductor memory according to an example of the present invention includes a memory cell array comprised of first and second blocks disposed side by side in a first direction, and a driver disposed on one end of the memory cell array in a second direction orthogonal to the first direction. First select gate lines in the first block and first select gate lines in the second block are connected to the driver after they are commonly connected in one end in the second direction of the memory cell array in a relation of one to one.
Public/Granted literature
- US20140355350A1 THREE DIMENSIONAL STACKED NONVOLATILE SEMICONDUCTOR MEMORY Public/Granted day:2014-12-04
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