Invention Grant
- Patent Title: Memory program disturb reduction
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Application No.: US14632556Application Date: 2015-02-26
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Publication No.: US09330777B2Publication Date: 2016-05-03
- Inventor: Akira Goda , Mark Helm , Pranav Kalavade , Charan Srinivasan
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G11C16/34 ; G11C16/26 ; G11C16/30 ; G11C16/10

Abstract:
Some embodiments include a memory device and a method of programming memory cells of the memory device. One such method can include applying, during a first pass of programming, a first bias voltage value to a source select gate to isolate memory cells from a source, applying a programming voltage to an access line of a page of the memory cells during the first pass of programming, and applying a second bias voltage value to the source select gate to isolate the memory cells from the source during a second pass of programming. Further devices, systems, and methods are disclosed.
Public/Granted literature
- US20150170756A1 MEMORY PROGRAM DISTURB REDUCTION Public/Granted day:2015-06-18
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