Invention Grant
US09330922B2 Self-aligned stack gate structure for use in a non-volatile memory array and a method of forming such structure
有权
用于非易失性存储器阵列的自对准堆叠栅极结构以及形成这种结构的方法
- Patent Title: Self-aligned stack gate structure for use in a non-volatile memory array and a method of forming such structure
- Patent Title (中): 用于非易失性存储器阵列的自对准堆叠栅极结构以及形成这种结构的方法
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Application No.: US13414400Application Date: 2012-03-07
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Publication No.: US09330922B2Publication Date: 2016-05-03
- Inventor: Willem-Jan Toren , Xian Liu , Gerhard Metzger-Brueckl , Nhan Do , Stephan Wege , Nadia Miridi , Chien-Sheng Su , Cecile Bernardi , Liz Cuevas , Florence Guyot , Yueh-Hsin Chen , Henry Om'mani , Mandana Tadayoni
- Applicant: Willem-Jan Toren , Xian Liu , Gerhard Metzger-Brueckl , Nhan Do , Stephan Wege , Nadia Miridi , Chien-Sheng Su , Cecile Bernardi , Liz Cuevas , Florence Guyot , Yueh-Hsin Chen , Henry Om'mani , Mandana Tadayoni
- Applicant Address: US CA San Jose
- Assignee: Silicon Storage Technology, Inc.
- Current Assignee: Silicon Storage Technology, Inc.
- Current Assignee Address: US CA San Jose
- Agency: DLA Piper LLP
- Main IPC: H01L29/788
- IPC: H01L29/788 ; H01L21/28 ; H01L27/115 ; H01L21/762
Abstract:
A stack gate structure for a non-volatile memory array has a semiconductor substrate having a plurality of substantially parallel spaced apart active regions, with each active region having an axis in a first direction. A first insulating material is between each stack gate structure in the second direction perpendicular to the first direction. Each stack gate structure has a second insulating material over the active region, a charge holding gate over the second insulating material, a third insulating material over the charge holding gate, and a first portion of a control gate over the third insulating material. A second portion of the control gate is over the first portion of the control gate and over the first insulating material adjacent thereto and extending in the second direction. A fourth insulating material is over the second portion of the control gate.
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