Invention Grant
US09330942B2 Semiconductor device with wiring substrate including conductive pads and testing conductive pads 有权
具有布线基板的半导体器件包括导电焊盘和测试导电焊盘

Semiconductor device with wiring substrate including conductive pads and testing conductive pads
Abstract:
Miniaturization and high-performance of a semiconductor device are promoted, which has a package on package (POP) structure in which a plurality of semiconductor packages is stacked in a multistage manner. A testing conductive pad for determining the quality of a conduction state of a microcomputer chip and a memory chip is arranged outside a conductive pad for external input/output and thereby the route of a wire that couples the microcomputer chip and the memory chip to the testing conductive pad is reduced in length. Further, the wire that couples the microcomputer chip and the memory chip to the testing conductive pad is coupled to a pad in the outer row among conductive pads in two rows to be coupled to the microcomputer chip.
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