Invention Grant
- Patent Title: Chip-on-wafer package and method of forming same
- Patent Title (中): 芯片晶圆封装及其形成方法
-
Application No.: US14473375Application Date: 2014-08-29
-
Publication No.: US09331021B2Publication Date: 2016-05-03
- Inventor: Chen-Hua Yu , Ming-Fa Chen , Sung-Feng Yeh
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L23/02
- IPC: H01L23/02 ; H01L23/538 ; H01L23/00 ; H01L23/31 ; H01L21/768 ; H01L21/56 ; H01L25/065 ; H01L25/00

Abstract:
A package according to an embodiment includes a first device package and a fan-out RDL disposed over the first device package. The fan-out RDL extends past edges of the first device package. The first device package comprises a first die having a first redistribution layer (RDL) disposed on a first substrate, a second die having a second RDL disposed on a second substrate, an isolation material over the first die and extending along sidewalls of the second die, and a conductive via. The first RDL is bonded to the second RDL, and the first die and the second die comprise different lateral dimensions. At least a portion of the conductive via extends from a top surface of the isolation material to contact a first conductive element in the first RDL.
Public/Granted literature
- US20150318246A1 CHIP-ON-WAFER PACKAGE AND METHOD OF FORMING SAME Public/Granted day:2015-11-05
Information query
IPC分类: