An integrated circuit may include interconnects formed from alternating metal interconnect layers and inter-metal dielectric layers. A metal-insulator-metal capacitor may be formed within a selected inter-metal dielectric layer. The metal-insulator-metal capacitor may include first and second capacitor electrodes. The first capacitor electrode may contact a first conductive interconnect line in an underlying metal interconnect layer. The second capacitor electrode may overlap the first capacitor electrode and a portion of a second conductive interconnect line in the underlying metal layer. A via may be formed between the underlying metal interconnect layer and an additional metal interconnect layer. The via may simultaneously contact the second capacitor electrode and the second conductive interconnect line.