Semiconductor device having a carbon containing insulation layer formed under the source/drain

Invention Grant

US09331173B2 Semiconductor device having a carbon containing insulation layer formed under the source/drain 有权

Title translation: 在源极/漏极下形成有含碳绝缘层的半导体器件

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Patent Title: Semiconductor device having a carbon containing insulation layer formed under the source/drain
Patent Title (中): 在源极/漏极下形成有含碳绝缘层的半导体器件
Application No.: US14809614

Application Date: 2015-07-27
Publication No.: US09331173B2

Publication Date: 2016-05-03
Inventor: Shih-Wen Liu , Mei-Yun Wang , Hsien-Cheng Wang , Fu-Kai Yang , Hsiao-Chiu Hsu , Hsin-Ying Lin
Applicant: Taiwan Semiconductor Manufacturing Company Limited
Applicant Address: TW Hsin-Chu
Assignee: Taiwan Semiconductor Manufacturing Company Limited
Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
Current Assignee Address: TW Hsin-Chu
Agency: Cooper Legal Group, LLC
Main IPC: H01L21/4763
IPC: H01L21/4763 ; H01L29/66 ; H01L27/088 ; H01L29/45 ; H01L29/417 ; H01L21/8234 ; H01L29/06 ; H01L29/40

Semiconductor device having a carbon containing insulation layer formed under the source/drain

Abstract:

A semiconductor arrangement and method of formation are provided herein. A semiconductor arrangement includes a metal connect in contact with a first active region and a second active region, and over a shallow trench isolation region located between the first active region and a second active region. A method of forming the semiconductor arrangement includes recessing the metal connect over the STI region to form a recessed portion of the metal connect. Forming the recessed portion of the metal connect in contact with the first active region and the second active region mitigates RC coupling, such that a first gate is formed closer to a second gate, thus reducing a size of a chip on which the recessed portion is located.

Abstract(Chinese):

本文提供半导体布置和形成方法。半导体装置包括与第一有源区和第二有源区接触的金属连接以及位于第一有源区和第二有源区之间的浅沟槽隔离区。形成半导体装置的方法包括将金属连接凹入到STI区域上以形成金属连接的凹陷部分。形成与第一有源区域和第二有源区域接触的金属的凹陷部分缓和RC耦合，使得第一栅极形成得更靠近第二栅极，从而减小其上凹陷部分的芯片的尺寸位于。

Public/Granted literature

US20150333149A1 SEMICONDUCTOR ARRANGEMENT AND FORMATION THEREOF Public/Granted day:2015-11-19

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02	.半导体器件或其部件的制造或处理
H01L21/04	..至少具有一个跃变势垒或表面势垒的器件，例如PN结、耗尽层、载体集结层
H01L21/34	...具有H01L21/06，H01L21/16及H01L21/18各组不包含的或有或无杂质，例如掺杂材料的半导体的器件
H01L21/46	....用H01L21/36至H01L21/428各组不包含的方法或设备处理半导体材料的（在半导体材料上制作电极的入H01L21/44）
H01L21/461	.....改变半导体材料的表面物理特性或形状的，例如腐蚀、抛光、切割
H01L21/4763	......非绝缘层的沉积，例如绝缘层上的导电层、电阻层；这些层的后处理（电极的制造入H01L21/28）