Invention Grant
US09331597B2 Latching comparator 有权
锁存比较器

Latching comparator
Abstract:
A latching comparator includes a switching logic circuit coupled to receive a first signal from a first signal circuit, and a second signal from a second signal circuit. The switching logic circuit is further coupled to receive a latching signal that is a rectangular pulse waveform in either a first or a second state. An output circuit having an input terminal is coupled to the switching logic circuit. The input terminal of the output circuit is coupled to receive both the first and second signals to compare the first signal and second signal when the latching signal is in the first state. The input terminal of the output circuit is coupled to receive only one of the first and second signals when the latching signal is in the second state.
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