A emitter circuit for providing a bias voltage is disclosed. The emitter circuit can comprise an emitter. The emitter circuit can comprise a transductor that includes a primary winding and a secondary winding. The secondary winding can be operable to receive an alternating current (AC) carrier signal. The emitter circuit can comprise a voltage multiplier operable to receive the AC carrier signal from the secondary winding and generate a DC bias voltage. The emitter circuit can comprise a zener diode to limit an amplitude of the DC bias voltage applied across the emitter. The emitter circuit can comprise a filter capacitor operable to smooth the DC bias voltage applied across the emitter.