Invention Grant
- Patent Title: On-chip test for integrated AC coupling capacitors
- Patent Title (中): 集成交流耦合电容器片上测试
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Application No.: US14156487Application Date: 2014-01-16
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Publication No.: US09335370B2Publication Date: 2016-05-10
- Inventor: Eugene Atwood , Matthew B. Baecher , John F. Bulzacchelli , Stanislav Polonsky
- Applicant: GLOBALFOUNDRIES
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Scully Scott Murphy and Presser
- Main IPC: G01R31/316
- IPC: G01R31/316 ; G01R31/28 ; G01R1/30 ; G01R31/02

Abstract:
Apparatus, method and computer program product for determining presence and relative magnitudes of on-chip AC coupling capacitors in a high-speed differential receiver device. A BIST method is employed to ultimately produce a dock count proportional to the fall time of a capacitor, and in the case of differential capacitors a difference in count values. Each capacitor path has a controllable first DAC current or voltage source. A second DAC current or voltage source, later in the data path and isolated from the capacitor node(s), is controlled to offset the voltage contribution of the charged and discharging capacitor. A count is recorded, starting when a capacitor charging current is shut off, and ends (the count) when the voltage of the charged capacitor falls below a threshold. A difference in count between the two data path capacitors is calculated and reported. A state machine operates the sequencing and control of the BIST.
Public/Granted literature
- US20150198647A1 ON-CHIP TEST FOR INTEGRATED AC COUPLING CAPACITORS Public/Granted day:2015-07-16
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