Invention Grant
US09336148B2 Cache memory, cache memory control unit, and method of controlling the cache memory 有权
高速缓冲存储器,缓存存储器控制单元和控制高速缓冲存储器的方法

Cache memory, cache memory control unit, and method of controlling the cache memory
Abstract:
A cache memory includes: a tag storage section in which one of a plurality of indexes, each index containing a plurality of tag addresses and one suspension-indicating section, is looked up by a first address portion of an accessed address; a data storage section; a tag control section configured to, when the suspension-indicating section contained in the looked-up index indicates suspension, allow access relevant to the accessed address to wait, and when the suspension-indicating section contained in the looked-up index indicates non-suspension, compare a second address portion different from the first address portion of the accessed address to each of the plurality of tag addresses contained in the looked-up index, and detects a tag address matched with the second address portion; and a data control section.
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