Invention Grant
- Patent Title: Semiconductor memory device and driving method thereof
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Application No.: US14460399Application Date: 2014-08-15
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Publication No.: US09336858B2Publication Date: 2016-05-10
- Inventor: Shunpei Yamazaki , Yasuhiko Takemura
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2010-012417 20100122
- Main IPC: G11C11/24
- IPC: G11C11/24 ; G11C11/4096 ; G11C11/404 ; G11C16/02 ; H01L21/28 ; H01L27/115 ; H01L27/105 ; G11C16/04 ; H01L49/02

Abstract:
A semiconductor device which stores data by using a transistor whose leakage current between source and drain in an off state is small as a writing transistor. In a matrix including a plurality of memory cells in which a drain of the writing transistor is connected to a gate of a reading transistor and the drain of the writing transistor is connected to one electrode of a capacitor, a gate of the writing transistor is connected to a writing word line; a source of the writing transistor is connected to a writing bit line; and a source and a drain of the reading transistor are connected to a reading bit line and a bias line. In order to reduce the number of wirings, the writing bit line or the bias line is substituted for the reading bit line in another column.
Public/Granted literature
- US20140355333A1 SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD THEREOF Public/Granted day:2014-12-04
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