A package comprises a semiconductor device. The semiconductor device comprises an active surface and side surfaces. The active surface has a contact pad. The package also comprises a mold covering the side surfaces of the semiconductor device. The package further comprises an interconnection line coupled with the contact pad and extending over the active surface of the semiconductor device. The package additionally comprises an under-bump metallurgy (UBM) layer over the interconnection line. The package also comprises a seal ring structure extending around and outside an upper periphery of the semiconductor device on the mold, the seal ring structure comprising a seal layer extending on a same level as at least one of the interconnection line or the UBM layer.