Invention Grant
- Patent Title: Semiconductor device and method for manufacturing same
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US14389812Application Date: 2013-03-29
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Publication No.: US09337213B2Publication Date: 2016-05-10
- Inventor: Kazuatsu Ito , Yutaka Takamaru , Tadayoshi Miyamoto , Mitsunobu Miyamoto , Makoto Nakazawa , Yasuyuki Ogawa , Seiichi Uchida , Shigeyasu Mori
- Applicant: Sharp Kabushiki Kaisha
- Applicant Address: JP Osaka
- Assignee: Sharp Kabushiki Kaisha
- Current Assignee: Sharp Kabushiki Kaisha
- Current Assignee Address: JP Osaka
- Agency: Keating & Bennett, LLP
- Priority: JP2012-085903 20120404
- International Application: PCT/JP2013/059615 WO 20130329
- International Announcement: WO2013/150981 WO 20131010
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L29/417 ; H01L21/3205 ; H01L21/768 ; H01L29/786 ; H01L21/02

Abstract:
This semiconductor device (100) includes: a gate electrode (3); a gate insulating layer (4); an oxide layer (50) which is formed on the gate insulating layer (4) and which includes a first conductor region (55) and a first semiconductor region (51) that overlaps at least partially with the gate electrode (3) with the gate insulating layer (4) interposed between them; a source electrode (6s) formed to contact with the upper surface of the first semiconductor region (51) of the oxide layer (50); a drain electrode (6d) which is formed to contact with the upper surface of the first semiconductor region (51) of the oxide layer (50) and which is electrically connected to the first conductor region (55); and a conductive layer (60) which is formed in contact with the upper surface of the oxide layer (50) and which a plurality of holes (66) or notches. The oxide layer (50) has a plurality of second conductor regions (57, 58), and each of which has a surface exposed inside respective one of the holes or notches of the conductive layer.
Public/Granted literature
- US20150053969A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME Public/Granted day:2015-02-26
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