Invention Grant
- Patent Title: Method of manufacturing MOS-type semiconductor device
- Patent Title (中): 制造MOS型半导体器件的方法
-
Application No.: US14455347Application Date: 2014-08-08
-
Publication No.: US09337288B2Publication Date: 2016-05-10
- Inventor: Shuhei Tatemichi , Takeyoshi Nishimura
- Applicant: FUJI ELECTRIC CO., LTD.
- Applicant Address: JP Kawasaki-Shi
- Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee Address: JP Kawasaki-Shi
- Agency: Rabin & Berdo, P.C.
- Priority: JP2013-170698 20130820
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L29/10 ; H01L29/08 ; H01L29/66 ; H01L21/02 ; H01L21/265

Abstract:
A method of manufacturing a MOS-type semiconductor device capable of increasing the thickness of a gate oxide film and obtaining high gate withstanding power and reduced switching loss without increasing a gate threshold voltage Vth is provided. A p-type well region is selectively formed on one principle surface of a semiconductor substrate having an n-type low impurity concentration layer by using an oxide film as a mask. Subsequently, a resist mask is formed on the surface of the p-type well region so as to be separated from the oxide film mask, and an n+-type source region is selectively formed from the separation portion. Subsequently, the oxide film mask is removed. Then, an oxide film is formed on the surface of the p-type well region, and the oxide film is removed. Subsequently, a gate electrode coated with a gate oxide film is formed on the surface of the semiconductor substrate.
Public/Granted literature
- US20150056776A1 METHOD OF MANUFACTURING MOS-TYPE SEMICONDUCTOR DEVICE Public/Granted day:2015-02-26
Information query
IPC分类: