Invention Grant
US09338881B2 Manufacturing a printed circuit board with reduced dielectric loss
有权
制造具有降低的介电损耗的印刷电路板
- Patent Title: Manufacturing a printed circuit board with reduced dielectric loss
- Patent Title (中): 制造具有降低的介电损耗的印刷电路板
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Application No.: US13531959Application Date: 2012-06-25
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Publication No.: US09338881B2Publication Date: 2016-05-10
- Inventor: Moises Cases , Bradley D. Herrman , Bhyrav M. Mutnury , Nam H. Pham , Terence Rodrigues
- Applicant: Moises Cases , Bradley D. Herrman , Bhyrav M. Mutnury , Nam H. Pham , Terence Rodrigues
- Applicant Address: SG Singapore
- Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
- Current Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Kennedy Lenart Spraggins LLP
- Agent Edward J. Lenart; Katherine S. Brown
- Main IPC: H05K3/20
- IPC: H05K3/20 ; H05K1/02 ; H05K3/46

Abstract:
In a particular embodiment, a method of manufacturing a printed circuit board (‘PCB’) with reduced dielectric loss includes fabricating conductive traces disposed upon layers of dielectric material; and fabricating the layers of dielectric material, including core layers and prepreg layers, with one or more of the layers of dielectric material including pockets of air that reduce an overall relative dielectric constant of the PCB. In the particular embodiment, the conductive traces are disposed upon layers of the dielectric material orthogonally with respect to one another and the pockets of air are aligned at an angle of 45 degrees with respect to the conductive traces.
Public/Granted literature
- US20130025119A1 Printed Circuit Board With Reduced Dielectric Loss Public/Granted day:2013-01-31
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