Invention Grant
US09349424B2 Semiconductor apparatus configured to manage an operation timing margin
有权
被配置为管理操作定时裕度的半导体装置
- Patent Title: Semiconductor apparatus configured to manage an operation timing margin
- Patent Title (中): 被配置为管理操作定时裕度的半导体装置
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Application No.: US14488603Application Date: 2014-09-17
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Publication No.: US09349424B2Publication Date: 2016-05-24
- Inventor: Seok Bo Shim , Hee Jin Byun , Jong Ho Jung
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-Si
- Assignee: SK HYNIX INC.
- Current Assignee: SK HYNIX INC.
- Current Assignee Address: KR Icheon-Si
- Agency: William Park & Associates Ltd.
- Priority: KR10-2014-0071252 20140612
- Main IPC: G11C7/10
- IPC: G11C7/10 ; G11C7/22

Abstract:
A semiconductor apparatus may include a read path configured to transmit data from the semiconductor apparatus in response to a read command and at least one read operation control signal, and an operation control circuit configured to receive a plurality of divided clock signals and the read command to identify the one of the plurality of divided clock signals that is relatively better matched to the received read command to manage timings associated with at least one of the read operation control signals.
Public/Granted literature
- US20150364172A1 SEMICONDUCTOR APPARATUS CONFIGURED TO MANAGE AN OPERATION TIMING MARGIN Public/Granted day:2015-12-17
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