A non-volatile semiconductor device includes first and second selecting transistors; multiple memory cells that are stacked above the substrate; multiple word lines that are connected to control gates of the multiple memory cells; selecting gate lines that are each connected to a gate of one of the selecting transistors; a bit line connected to the first selecting transistor; a source line connected to the second selecting transistor; and a control circuit configured to execute an erasing loop that includes an erase operation and a verifying operation. The control circuit increases an erasing voltage in accordance with the number of times the erasing loop is repeated.