Invention Grant
US09349653B2 Manufacturing method of semiconductor structure for preventing surface of fin structure from damage and providing improved process window
有权
半导体结构的制造方法，用于防止翅片结构的表面损坏并提供改进的工艺窗口
- Patent Title: Manufacturing method of semiconductor structure for preventing surface of fin structure from damage and providing improved process window
- Patent Title (中): 半导体结构的制造方法，用于防止翅片结构的表面损坏并提供改进的工艺窗口
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Application No.: US14539225Application Date: 2014-11-12
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Publication No.: US09349653B2Publication Date: 2016-05-24
- Inventor: Chao-Hung Lin , Shih-Hung Tsai , Ssu-I Fu , Chih-Sen Huang , Li-Wei Feng , Jyh-Shyang Jenq
- Applicant: UNITED MICROELECTRONICS CORP.
- Applicant Address: TW Hsinchu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Hsinchu
- Agency: WPAT, P.C.
- Agent Justin King
- Priority: CN201410525197 20141008
- Main IPC: H01L21/8228
- IPC: H01L21/8228 ; H01L21/8222 ; H01L21/8234 ; H01L21/768
Abstract:
A manufacturing method of a semiconductor structure is provided. The manufacturing method includes the following steps. A substrate is provided. A fin structure and an inter-layer dielectric layer are formed on the substrate. A plurality of gate structures is formed on the substrate. A cap layer is formed on the gate structures. A hard mask is formed on the cap layer. A first patterned photoresist layer covering the gate structures is formed on the hard mask. The hard mask is etched and patterned to form a patterned hard mask, such that the patterned hard mask covers the gate structures. A second patterned photoresist layer including a plurality of openings corresponding to the fin structure is formed on the patterned hard mask. The cap layer and the inter-layer dielectric layer are etched to form a plurality of first trenches exposing part of the fin structure.
Public/Granted literature
- US20160104647A1 MANUFACTURING METHOD OF A SEMICONDUCTOR STRUCTURE Public/Granted day:2016-04-14
Information query
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