A memory device includes a plurality of stacks of conductive strips, a plurality of word lines over and orthogonal to the plurality of stacks of conductive strips, a plurality of vertical gate columns, and control circuitry. The plurality of word lines is electrically coupled to the plurality of vertical gate columns acting as gates controlling current flow in the plurality of stacks of conductive strips. The plurality of word lines including a first word line and a second word line adjacent to each other. The plurality of vertical gate columns is between the plurality of stacks of conductive strips. The plurality of vertical gate columns includes a first set of vertical gate columns electrically coupled to the first word line and a second set of vertical gate columns electrically coupled to the second word line. The first set of vertical gate columns is staggered relative to the second set of vertical gate columns. The control circuitry controls the plurality of word lines as gates to control current flow in the plurality of stacks of conductive strips, and controls nonvolatile memory operations.