Method of manufacturing semiconductor device and semiconductor device

Invention Grant

US09355890B2 Method of manufacturing semiconductor device and semiconductor device 有权

Title translation: 制造半导体器件和半导体器件的方法

Please log in to see more content

Patent Title: Method of manufacturing semiconductor device and semiconductor device
Patent Title (中): 制造半导体器件和半导体器件的方法
Application No.: US13748873

Application Date: 2013-01-24
Publication No.: US09355890B2

Publication Date: 2016-05-31
Inventor: Tetsuya Iida
Applicant: Renesas Electronics Corporation
Applicant Address: JP Kawasaki-Shi, Kanagawa
Assignee: RENESAS ELECTRONICS CORPORATION
Current Assignee: RENESAS ELECTRONICS CORPORATION
Current Assignee Address: JP Kawasaki-Shi, Kanagawa
Agency: McGinn IP Law Group, PLLC
Priority: JP2012-030498 20120215
Main IPC: H01L21/8242
IPC: H01L21/8242 ; H01L21/762 ; H01L29/06 ; H01L21/306 ; H01L21/84 ; H01L27/12

Method of manufacturing semiconductor device and semiconductor device

Abstract:

Disclosed is a miniaturized semiconductor device having an SOI layer, in which: a silicon layer is formed over a semiconductor substrate via an BOX film; after the silicon layer is patterned by using a nitride film as a mask, an insulating film covering the surface of each of the nitride film, the silicon layer, and the BOX film is formed; subsequently, an opening, which penetrates the insulating film and the BOX film and which exposes the upper surface of the semiconductor substrate, is formed, and an epitaxial layer is formed in the opening; subsequently, the SOI region and a bulk silicon layer are formed over the semiconductor substrate by flattening the upper surface of the epitaxial layer with the use of the nitride film as an etching stopper film.

Abstract(Chinese):

公开了一种具有SOI层的小型半导体器件，其中：通过BOX膜在半导体衬底上形成硅层; 在通过使用氮化物膜作为掩模对硅层进行图案化之后，形成覆盖氮化物膜，硅层和BOX膜中的每一个的表面的绝缘膜; 随后，形成穿透绝缘膜和BOX膜并露出半导体衬底的上表面的开口，并且在开口中形成外延层; 随后，通过使用氮化物膜作为蚀刻停止膜来平坦化外延层的上表面，在半导体衬底上形成SOI区域和体硅层。

Public/Granted literature

US20130207228A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE Public/Granted day:2013-08-15

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8239	........存储器结构
H01L21/8242	.........动态随机存取存储结构（DRAM）