Invention Grant
- Patent Title: Method of providing a via hole and routing structure
- Patent Title (中): 提供通孔和布线结构的方法
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Application No.: US14389592Application Date: 2013-03-28
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Publication No.: US09355895B2Publication Date: 2016-05-31
- Inventor: Thorbjorn Ebefors , Daniel Perttu
- Applicant: Thorbjorn Ebefors , Daniel Perttu
- Applicant Address: SE Jarfalla
- Assignee: SILEX MICROSYSTEMS AB
- Current Assignee: SILEX MICROSYSTEMS AB
- Current Assignee Address: SE Jarfalla
- Agency: Young & Thompson
- Priority: SE1250323 20120330
- International Application: PCT/SE2013/050353 WO 20130328
- International Announcement: WO2013/147694 WO 20131003
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/14 ; H01L21/288 ; H01L23/522 ; H01L23/48 ; H01L23/498

Abstract:
A method of providing a via hole and routing structure includes: providing a substrate wafer having recesses and blind holes provided in the surface of the wafer; providing an insulating layer in the recesses and holes; metallizing the holes and recesses; and removing the oxide layer in the bottom of the holes to provide contact between the back side and the front side of the wafer. A semiconductor device, including a substrate having at least one metallized via extending through the substrate and at least one metallized recess forming a routing together with the via. There is an oxide layer on the front side field and on the back side field. The metal in the recess and the via is flush with the oxide on the field on at least the front side, whereby a flat front side is provided. The thickness of the semiconductor device is
Public/Granted literature
- US20150054136A1 METHOD OF PROVIDING A VIA HOLE AND ROUTING STRUCTURE Public/Granted day:2015-02-26
Information query
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