A 3D memory device includes a first plurality and a second plurality of stacks of semiconductor material strips on a substrate. The second plurality of stacks of gate material strips on the substrate is interleaved with, and coplanar with, the first plurality of stacks. The second plurality of stacks is configured as gates for the first plurality of stacks. A first plurality of word lines is arranged orthogonally over, and having surfaces conformal with, the first plurality of stacks, such that a 3D array of memory elements is established at cross-points between surfaces of the first plurality of stacks and the plurality of word lines.