Invention Grant
US09361418B2 Nanowire or 2D material strips interconnects in an integrated circuit cell
有权
纳米线或2D材料条在集成电路单元中互连
- Patent Title: Nanowire or 2D material strips interconnects in an integrated circuit cell
- Patent Title (中): 纳米线或2D材料条在集成电路单元中互连
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Application No.: US14312186Application Date: 2014-06-23
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Publication No.: US09361418B2Publication Date: 2016-06-07
- Inventor: Victor Moroz , Jamil Kawa
- Applicant: SYNOPSYS, INC.
- Applicant Address: US CA Mountain View
- Assignee: SYNOPSYS, INC.
- Current Assignee: SYNOPSYS, INC.
- Current Assignee Address: US CA Mountain View
- Agency: Haynes Beffel & Wolfeld LLP
- Agent Yiding Wu
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
An integrated circuit design tool includes a cell library. The cell library includes entries for a plurality of cells, entries in the cell library including specifications of particular cells in a computer executable language. At least one entry in the cell library can comprise a specification of physical structures and timing parameters of a circuit including a first transistor, a second transistor, and an interconnect connecting a terminal of the first transistor to a terminal of the second transistor, the interconnect comprising one or more nanowires or 2D material strips arranged in parallel. An integrated circuit including the circuit is described.
Public/Granted literature
- US20150370949A1 NANOWIRE OR 2D MATERIAL STRIPS INTERCONNECTS IN AN INTEGRATED CIRCUIT CELL Public/Granted day:2015-12-24
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