Invention Grant
- Patent Title: System and method for optimization of an imaged pattern of a semiconductor device
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Application No.: US14798331Application Date: 2015-07-13
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Publication No.: US09361420B2Publication Date: 2016-06-07
- Inventor: Shih-Ming Chang , Ming-Yo Chung , Tzu-Chun Lo , Ying-Hao Su
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G03F1/36 ; G03F1/70

Abstract:
In a method, a layout of a device having a pattern of features is provided. The method continues to include identifying a first portion of at least one feature of the plurality of features. An image criteria for the first portion may be assigned. A lithography optimization parameter is determined based on the assigned image criteria for the first portion. Finally, the first portion of the at least one feature is imaged onto a semiconductor substrate using the determined lithography optimization parameter.
Public/Granted literature
- US20150317424A1 SYSTEM AND METHOD FOR OPTIMIZATION OF AN IMAGED PATTERN OF A SEMICONDUCTOR DEVICE Public/Granted day:2015-11-05
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