Method and apparatus for modeling multi-terminal MOS device for LVS and PDK

Invention Grant

US09361425B2 Method and apparatus for modeling multi-terminal MOS device for LVS and PDK 有权

Title translation: 用于建立LVS和PDK的多端MOS器件的方法和装置

Please log in to see more content

Patent Title: Method and apparatus for modeling multi-terminal MOS device for LVS and PDK
Patent Title (中): 用于建立LVS和PDK的多端MOS器件的方法和装置
Application No.: US14679481

Application Date: 2015-04-06
Publication No.: US09361425B2

Publication Date: 2016-06-07
Inventor: Chau-Wen Wei , Cheng-Te Chang , Chin-Yuan Huang , Chih Ming Yang , Yi-Kan Cheng
Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
Applicant Address: TW Hsin-Chu
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
Current Assignee Address: TW Hsin-Chu
Agency: Slater Matsil, LLP
Main IPC: H01L21/8238
IPC: H01L21/8238 ; H01L21/8234 ; G06F17/50 ; H01L27/06 ; H01L27/088 ; H01L27/02

Method and apparatus for modeling multi-terminal MOS device for LVS and PDK

Abstract:

A method comprises identifying a semiconductor device layout region comprising a first n-type metal oxide semiconductor (MOS) device having a first pair of face-to-face diodes adjacent to a second n-type MOS device having a second pair of face-to-face diodes and adding a dummy device between a first body contact of the first n-type MOS device and a second body contact of the second MOS device.

Abstract(Chinese):

一种方法包括识别包括第一n型金属氧化物半导体（MOS）器件的半导体器件布局区域，所述第一n型金属氧化物半导体（MOS）器件具有与第二n型MOS器件相邻的第一对面对二极管，其具有第二对面对面并且在第一n型MOS器件的第一体接触和第二MOS器件的第二体接触之间添加虚设器件。

Public/Granted literature

US20150213190A1 Method and Apparatus for Modeling Multi-terminal MOS Device for LVS and PDK Public/Granted day:2015-07-30

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8238	........互补场效应晶体管，例如CMOS