Invention Grant
- Patent Title: Series connected resistance change memory device
- Patent Title (中): 串联电阻变化存储器件
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Application No.: US14421822Application Date: 2012-09-20
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Publication No.: US09361978B2Publication Date: 2016-06-07
- Inventor: Nobuhiro Shiramizu , Satoru Hanzawa , Akira Kotabe
- Applicant: Hitachi, Ltd.
- Applicant Address: JP Tokyo
- Assignee: Hitachi, Ltd.
- Current Assignee: Hitachi, Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Miles & Stockbridge P.C.
- International Application: PCT/JP2012/074080 WO 20120920
- International Announcement: WO2014/045372 WO 20140327
- Main IPC: G11C13/00
- IPC: G11C13/00 ; H01L27/24 ; H01L45/00

Abstract:
The invention is provided to suppress a current supplied to a storage element so as not to vary for each layer in a semiconductor memory device obtained by connecting a plurality of memory cells in series.A semiconductor memory device according to the invention includes a plurality of memory cells connected in series between a first signal line and a second signal line, and supplies a different gate voltage to at least two of selection transistors included in the memory cells, respectively (refer to FIG. 2).
Public/Granted literature
- US20150221367A1 SEMICONDUCTOR RECORDING DEVICE Public/Granted day:2015-08-06
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