Invention Grant
- Patent Title: Method of manufacturing a semiconductor device
- Patent Title (中): 制造半导体器件的方法
-
Application No.: US14633791Application Date: 2015-02-27
-
Publication No.: US09362318B2Publication Date: 2016-06-07
- Inventor: Kishou Kaneko , Naoya Inoue , Yoshihiro Hayashi
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Kanagawa
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Kanagawa
- Agency: Young & Thompson
- Priority: JP2011-273229 20111214
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L27/12 ; H01L27/088 ; H01L29/66 ; H01L23/522 ; H01L21/28 ; H01L21/02 ; H01L21/465 ; H01L21/4763 ; H01L29/49 ; H01L29/786

Abstract:
An interlayer insulating film is formed. Then a first gate electrode and a second gate electrode are buried in the interlayer insulating film. Then, an anti-diffusion film is formed over the interlayer insulating film, over the first gate electrode, and over the second gate electrode. Then, a first semiconductor layer is formed over the anti-diffusion film which is present over the first gate electrode. Then, an insulating cover film is formed over the upper surface and on the lateral side of the first semiconductor layer and over the anti-diffusion film. Then, a semiconductor film is formed over the insulating cover film. Then, the semiconductor film is removed selectively to leave a portion positioned over the second gate electrode, thereby forming a second semiconductor layer.
Public/Granted literature
- US20150171120A1 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE Public/Granted day:2015-06-18
Information query
IPC分类: