Invention Grant
- Patent Title: Well implant through dummy gate oxide in gate-last process
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Application No.: US14600847Application Date: 2015-01-20
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Publication No.: US09362399B2Publication Date: 2016-06-07
- Inventor: Sheng Chiang Hung , Huai-Ying Huang , Ping-Wei Wang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwn Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwn Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L27/06
- IPC: H01L27/06 ; H01L29/78 ; H01L29/66 ; H01L29/08 ; H01L29/167 ; H01L29/49 ; H01L21/8238

Abstract:
The present disclosure relates to methods for fabricating a field-effect transistor. The method includes performing a pocket implantation to a semiconductor substrate; thereafter forming a polysilicon layer on the semiconductor substrate; and patterning the polysilicon layer to form a polysilicon gate.The field-effect transistor (FET) includes a well of a first type dopant, formed in a semiconductor substrate; a metal gate disposed on the semiconductor substrate and overlying the well; a channel formed in the semiconductor substrate and underlying the metal gate; source and drain regions of a second type dopant opposite from the first type, the source and drain regions being formed in the semiconductor substrate and on opposite sides of the channel; and a pocket doping profile of the first type dopant and being defined in the well to form a continuous and uniform doping region from the source region to the drain region.
Public/Granted literature
- US20150155382A1 Well Implant Through Dummy Gate Oxide In Gate-Last Process Public/Granted day:2015-06-04
Information query
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