Invention Grant
US09367460B2 Implicit I/O send on cache operations 有权
隐式I / O发送缓存操作

Implicit I/O send on cache operations
Abstract:
A computer system for implicit input-output send on cache operations of a central processing unit is provided. The computer system comprises an aggregation queue of a central processing unit, storing input-output data of the central processing unit, wherein the aggregation queue transmits the input-output data to an input-output adaptor, and wherein the input-output data is transmitted in parallel with operations of the central processing unit. The computer system further comprises, a memory management unit of the central processing unit, interpreting address space descriptors for implicit input-output transmittal of the input-output data of the aggregation queue. The computer system further comprises, a cache traffic monitor of the central processing unit, transmitting the input-output data in an implicit input-output transmittal range between the cache traffic monitor and the aggregation queue, wherein the cache traffic monitor transmits cache protocol of the central processing unit to the memory management unit.
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