Invention Grant
- Patent Title: Bump I/O contact for semiconductor device
- Patent Title (中): 半导体器件的凸起I / O触点
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Application No.: US13621535Application Date: 2012-09-17
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Publication No.: US09368466B2Publication Date: 2016-06-14
- Inventor: Pradip D. Patel
- Applicant: Maxim Integrated Products, Inc.
- Applicant Address: US CA San Jose
- Assignee: Maxim Integrated Products, Inc.
- Current Assignee: Maxim Integrated Products, Inc.
- Current Assignee Address: US CA San Jose
- Agency: North Weber & Baugh LLP
- Main IPC: H01L23/00
- IPC: H01L23/00

Abstract:
A bump contact electrically connects a conductor on a substrate and a contact pad on a semiconductor device mounted to the substrate. The first end of an electrically conductive pillar effects electrical contact and mechanical attachment of the pillar to the contact pad with the pillar projecting outwardly from the semiconductor device. A solder crown reflowable at a predetermined temperature into effecting electrical contact and mechanical attachment with the conductor is positioned in axial alignment with the second end of the pillar. A diffusion barrier electrically and mechanically joins the solder bump to the second end of the pillar and resists electro-migration into the first end of the solder crown of copper from the pillar. One diffusion barrier takes the form of a 2-20 micron thick control layer of nickel, palladium, titanium-tungsten, nickel-vanadium, or tantalum nitride positioned between the pillar and the solder crown.
Public/Granted literature
- US20130015574A1 BUMP I/O CONTACT FOR SEMICONDUCTOR DEVICE Public/Granted day:2013-01-17
Information query
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